Communication networks are known that receive signals or data streams supplied to the network from a client, encapsulate the data included in the data streams into pluralities of successive frames, and transport such frames across the network. Typically, each of the client data streams has an associated data rate or frequency, which may be required to be maintained or preserved when the client data streams are output from the network.
Often, a client data stream may include multiplexed sub-streams, each having an associated data rate or frequency that is less than the client data stream itself. When the substreams are demultiplexed after being output from the network, each sub-stream should preferably have the same or substantially the same data rate as when such sub-streams had prior to being multiplexed and input to the network. Accordingly, timing information may be included in the client data streams output from the network, and such timing information may be used to demultiplex the sub-streams with the desired data rates. The timing information may often include so-called justification opportunities, which are bytes which are included in the client data streams in order to adjust the rate at the data is transmitted. For example, if a lower data rate is desired, the justification opportunity bytes may include null data, so that the data rate (or effective data rate), excluding the justification opportunity bytes, is reduced. On the other hand, if the justification opportunity bytes include the client's data, the effective data rate is increased. Typically, justification opportunities are provided for each sub-stream.
In one approach, justification opportunities for each sub-stream are generated based on clock signals, which are themselves output from so-called phase-lock-loop (PLL) circuits. As the information carrying capacity of networks has increased, however, more client data streams, as well as sub-streams, may be required. As a result, an increased number of PLL circuits may also be necessary, thereby increasing system power consumption, as well as system complexity.
Accordingly, an alternative approach is desired whereby justification opportunities are generated for sub-streams with circuitry that consumes relatively little power and has a relatively simple design.